1. Field of the Invention
The present invention relates to the field of semiconductor devices, and more particularly to transfer of data from domino circuits.
2. Prior Art
A variety of latching circuits are known for transferring of data. Generally, these latching circuits receive a data input and generate an output under control of a clocking signal. One class of latching circuits is comprised of an input latch, an output latch and some form of circuitry disposed between the two latches for operating on the input data before it is sent as an output from the output latch. In faster circuits, the data transition from input to output is achieved within a single clock cycle.
One form of the above circuitry, in which the circuitry between the latches provides logic operations based on an input signal are known as domino circuits. Domino circuits are generally used to evaluate a logic operation based on a given input. The logic operation can be performed within one or more logic stages. Where multiple stages are present, an evaluation of one stage is rippled to a subsequent stage until a final evaluation is made in the final stage. Thus, the effect is for the logic to ripple ("domino") through the various stages, wherein each subsequent stage performs its evaluation based on the previous evaluation. After the completion of the evaluation in the final stage, an output is provided from the domino circuit through the output latch.
In order to transition data rapidly from input to output, it is preferred to remove any delaying elements (or at least not introduce any additional delaying elements) in the data path. However, when delay is removed to speed the data transfer, unwanted conditions, such as racing conditions, start to occur. In a racing condition, a value of a data on a data line can be corrupted due to a presence of an unwanted signal on the data line. In such instances, a desire for speed has corrupted valid data, or has the potential of corrupting data. Although it may appear trivial, such conditions can present insurmountable obstacles in enhancing the data transfer rate. In the design of microprocessors, any speed gained without the potential for corrupting data is a significant improvement.
The present invention resides within this category of improvements, where data transfer speed is enhanced without compromising the validity of that data.